Two files that you should get are: writer.hex 4,871 bytes, the intel hex file firmware for 89C2051 chip ( the actual code size is 2021 bytes) and, ez.exe 20,800 bytes the uploader program run on PC, send hex file to the downloader. The original writer.c program was written in 'C'. Easy-Downloader V1.1 for ATMEL 89C2051/4051 Wichit Sirichote, kswichit@kmitl.ac.th Build your own a personal writer for programming HEX code into Flash based microcontroller AT89C2051(2k) and AT89C4051(4k). Simple hardware and Easy use software in DOS and Window version. Single-side and double side PCB files included. Acrobat files for PCB image.

#394 AT89C2051/Programmer Building a programmer for the Intel MCS-51/8051 compatible AT89C2051, with host software running on MacOSX. Notes I've been meaning to dive a bit deeper into devices and programming ever since I built the LEAP#088 ElectronicClockKit. While it's long been EOL at Intel, is a valiant argument for why they are still around. I have some (still in production) chips - but before I can do much more, I need a programmer. Reading the AT89C2051 datasheet, its seems programming is actually a quite straight-forward process - the only complication being the need for a 12V programming voltage in addition to standard logic high of ~5V. So while I could go out and buy a programmer, the idea of building my own is very attractive for two reasons: • it is a bit of a short cut to building familiarity with the chip and datasheet • I can make sure it supports my host platform of choice - MacOSX Inspirations and Prior Art I found a couple of interesting projects that provided a good starting point. I'd recommend checking these out.

Schematic Atmel 89C2051 In-Circuit Programmer Schematic This is a 'beta release' schematic. Use at your own risk The idea is to add this circuitry to a board with already has ram at 2000 and an 82C55 I/O chip to provide ports A, B and C.

Warning: not shown here is a memory mapping trick which is described below. You must figure out a way to provide the necessary memory mapping to make beta version 0.003 work. The next beta release will fix this problem, so that an ordinary memory configuration will work. But for now a hardware trick or some preprocessing of your intel hex files is needed. The AND and NAND gates shown should be 74HC08 and 74HC00 respectively. Cara buat game tebak kata dengan flash. It a TTL type NAND gate is used (eg LS, L, S, ALS, etc) the crystal oscillator may be problematic.

Several people have asked. Here's a few things to try. NOTE: in the above schematic, the line indicated P3.3 (which controls the TXD echo feature) should really connect to P3.4, and the one labeled P3.4 really ought to connect to P3.3. I'll get a fixed copy of this schematic on-line sometime, with the signals names that now appear in. On the bright side, if you do connect it differently, it's a simple matter to reassign the pins in the software with 0.004. The inputs on the left side of the schematic come from the ports on the 8051 and 82C55. Port A, Port B, and PC.0 come from the 82C55, and the other lines are from the 8051.

The TXD pin of the 8051 is connected to the TXD(in) input line, and the TXD(out) line is connected to the line driver for the programmer's serial transmit. This simple three gate circuit provides the 'echo-through' feature which is useful for troubleshooting code while the 89C2051 is in-circuit by echoing data to the programmer's transmit line. The 20 pin ribbon cable should leave pins 1, 4, and 5 unconnected. Double check that pin 10 is connected to ground.

Add stuff here about the power supply issues. I suggest connecting pin 20 in the ribbon cable to Vcc on the programmer. Do not connect XTAL2 (pin 4) of the 89C2051 chip. The 15 switches shown are the gates within the CD4066, so four of these chips are required. The three NMOS transistors are within a single CD4007 chip. The trick here is to not use the three PMOS transistors which also come in this chip.

You must connect +12 volts to pin 14. I'll add more more detailed information about how to connect this chip, hopefully in a week or so.

If you're building from this beta schematic and need some assistance. Basically, the two PMOS transistors with floating drains get their drains and sources connected to Vcc. The third PMOS transistor whose drain is connected to an NMOS drain inside the chip gets it's source (the other line) connected to the drain, which is also the drain of one of the NMOS transistors. Pin 14 MUST be connected to +12 volts to avoid damage to this chip. Warning: beta code 0.003 expects RAM to exist at location 0x2000 to store a copy of the data to be programmed into the 89C2051.